The present system and method is generally applicable to the processing of digital signals, and specifically for a system and method of automatic gain control processing to detect and demodulate a received signal.
In a typical digital communication system, a digital signal may be comprised of a preamble followed by the data payload. The preamble contains a series of bits or symbols which provides information relating to the waveform type, the data rate, the phase error, the timing error and the frequency offset necessary to demodulate the received signal. It is common to use a process of automatic gain control (AGC) to process the received digital signal bit by bit, or sample by sample, in order to detect the presence of the waveform and extract the information needed to demodulate the data received in the signal where a sample may include a symbol or plural bits.
The sample-by-sample AGC process normally starts at a zero state and ramps up when a signal is received to bring the received signal to an optimum level for the receiver. The “settling” time of an AGC is the time required by the AGC to bring the received signal to an optimum level within the dynamic range of the receiver. During the settling time, the receiver is generally unable to perform other functions, such as training, symbol detection, etc. This means that the settling time tends to increase the “overhead” of the receiver.
Because the time of arrival of a received signal is generally not known, it is extremely important to minimize the settling time of the AGC so that the received signal can be brought to an optimum level as quickly as possible. The slower the AGC processing, the more distortion will be introduced into the signal preamble due to the transient effect on the leading edge of the received signal. This preamble distortion may degrade the ability of the processor to detect the preamble and may result in less than optimal modem performance. One known method of addressing the problem of settling time and the resultant preamble distortion is to increase the length of the preamble sufficiently to account for the settling time and to allow sufficient processing of the preamble. Thus, the conventional sample-by-sample AGC is not suitable for short duration preamble waveforms.
The same sample-by-sample AGC processor is typically used for both searching for the signal (preamble detection) and for tracking the signal (demodulation) once the signal is detected. A sample-by-sample AGC processor requires a sufficient number of bits or samples in order to detect and begin processing the preamble and thus tend to be slow.
The present disclosure increases the processing of digital signals by implementing two stage automatic gain control processing. In the searching stage, a block AGC processor is utilized to detect the signal, and in the tracking stage, a sample-by-sample AGC processor, using parameters passed from the block AGC processor as an initial condition, demodulates the signal.
Accordingly, it is an object of the present invention to provide a novel method and system for detecting and demodulating digital signals.
It is another object of the present invention to provide a novel system and method of decreasing the time required to detect a signal using automatic gain control.
It is a yet another object of the present invention to provide a novel system and method or reducing the distortion introduced through automatic gain control processing.
It is still another object of the present invention to provide a novel system and method to reduce the transient effect of automatic gain control processing during preamble detection which permits the use of a shorter preamble.
These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which it pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.